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| features ? contactless read/write data transmission radio frequency f rf : 100 khz to 200 khz user memory (1024 bits): 32 write protectable 32-bit blocks of data deterministic anticolli sion: detection rate ~ 20 tags /s with 40-bit tag id, rf/32 on-chip crc generator: 16-bit crc-cci tt compliant to iso/iec 11785 downlink transmission: enhanced 1 out of 4 pulse interval en coding (~ 5 kbps) uplink transmission: ask modulated, nrz , manchester or bi-phase encoding integrated tuning capacitor: 75 pf 10% as mask option system memory (320 bits): ? 10 write and password protectable 32 bit blocks of data ? tag id (96 bits maximum) ? traceability data with inhere nt manufacturer serial number ? write password (32 bits) and read password (32 bits), with page orientated memory protection areas ? configuration register for setup of: selectable data bit rate: rf/2 .. rf/64 selectable tag id length to optimize anticollision detection rate start of frame with variable preamble length to simplify interrogator design public mode (pm) for read only tag emulation electrical article su rveillance (eas) mode direct data (nrz), bi-phase (fdx -b) or manchester data encoding 1. general description the ata5558 is a contactless, two-terminal r/w-identification ic (idic ? ) for multi- or single tag applications in the low frequency ( 125 khz) range. the passive tag uses the external rf signal to generate it?s own power supply and internal clock reference. figure 1-1. rfid system using an ata5558 tag it contains an eeprom which is subdivide d into 1024 bits of user memory and 320 bits of system memory. both memory sections are organized in data blocks of 32 bits, each equipped with an associated lo ck bit for block write protection. the user memory, which is intended for storage of recallable user data, is made of 32 such blocks. the 10 block system memory section is reserved for system parameter and configuration settings. two of these blocks include a 32 bit read and a 32 bit write password to prevent unauthorized read and/or write access to protected user defin- able memory pages. base station data power transponder reader or interrogator ata5558 * mask option * controller coil interface memory 1 kbit r/w idic ? with deterministic anticollision ata5558 preliminary rev. 4681c?rfid?09/05
2 4681c?rfid?09/05 ata5558 [preliminary] the ata5558 receives commands from the interrogator (downlink) as a 1 out of 4 pulse interval encoded, amplitude modulated signal. return data transmission from the tag to the interrogator (uplink) utilizes either manchester, bi-phas e or nrz encoded amplitude modulation. this is achieved by controlled damping of the interrogat or?s rf field with an on-chip resistive load between the two tag terminals, coil 1 and coil 2. multi-tag identification is implemented using a deterministic anticollision algori thm which requires unique tag id entification information (tag id?s). three blocks within the system memory are reserved for storage of the tag id, the length of which is user configurable up to a maximum of 96 bits. figure 1-2. system block diagram 2. functional blocks 2.1 analog front end the analog front end (afe) includes all circuitry directly associated with the coil interface. it gen- erates the internal power supply and handles the data communication with the interrogator. it consists of the following blocks: rectifier to generate a dc supply voltage from the ac coil voltage low-voltage regulator to provide an on-chip stabilized dc voltage charge pump to generate the high voltage required for eeprom programming on-chip tuning capacitor (mask option) field clock extractor field gap detector for data transmission from interrogator to tag load switching between coil 1/coil 2 for data transmission from tag to interrogator electrostatic discharge protection (esd) analog front end binary bitrate generator ppm signal decoder system memory user memory (1kbit eeprom) modulator hv generator input register * coil 1 coil 2 * mask option mode register anticollision logic controller por 3 4681c?rfid?09/05 ata5558 [preliminary] 2.2 power-on reset (por ) and initialization the power-on-reset circuit (por) maintains the circuit in a reset state until an adequate inter- nal operating voltage threshold level has bee n reached, whereupon a default start-up delay sequence is started. during this period of 200 field clock cycles, the configuration and security setup is initialized from the system configuration and page security blocks. 2.3 control logic the control logic is responsible for the following functions: initialization and reloading of the configuration from eeprom control of read and write memory access operations data transmission and command decoding crc check, error detection and error handling 2.4 modulator the modulator output circuitry controls the swit ching of a resistive load between the coil 1 and coil 2 pads to transmit data from the tag to the interrogator (uplink). the ask load modulator is driven from the manchester, bi-phase encoder or directly from the eeprom memory data stream (nrz) according to the uplink encoding configuration. figure 2-1. manchester timing diagram table 2-1. types of modulation uplink mode manchester encoding bi-phase encoding (1) nrz ? direct data ask-coded modulation 0 = falling edge on mid bit 1 = rising edge on mid bit 0 = rising or falling edge 1 = no edge on mid bit 1 = modulation off 0 = modulation on note: 1. since bi-phase encoding is data dependent the following definitions apply to the ata5558 implementation. - the tag modulates the first (half) bit period after sof. - if the last bit of a data stream is a logical 1 it is possible that this bit period is non-modu- lated and therefore is not detectable directly by the reader. 1 data rate = f rf /16 0 01 nrz data stream manchester coded rf field manchester coded modulator signal 4 4681c?rfid?09/05 ata5558 [preliminary] figure 2-2. bi-phase timing diagram 2.5 binary bit rate generator the tag?s data rate is binary programmable in the c onfiguration register to operate at any bit rate between rf/2 and rf/64. 2.6 memory section 2.6.1 memory map the physical memory is subdivided into two logical sections (see figure 2-3 ). the first logical memory section contains the 1024 bits of user data. the second logical memory section con- tains 320 bits of system/configuration data. both memories are organized in 32-bit data blocks, each block being equipped with a single lock bit, with which the associated block can be write protected. command controlled programming and reading always takes place on a serial msb first block basis so that a block constitutes the smallest directly accessible data unit. the user memory is further subdivided into 8 pages, each of 4 blocks in size. this provides the basis of the page security scheme ( ?password protection? on page 6 ). figure 2-3. memory map structure 1 data rate = f rf /8 0 nrz data stream biphase coded rf field bi-phase coded modulator signal 01 110 1 data rate rf 2n 1 + () --------------------- = 31 : 4 3 2 1 0 30 29 7 6 5 28 27 31 36h 37h 3eh 3fh 3dh 3ch 3bh 3ah 39h 38h 1eh 1fh 1dh 1ch 00h 01h 03h 02h 1bh 04h 05h 06h 07h l l l l l l l l configuration password/page security traceability 3 traceability 2 traceability 1 tag id 3 tag id 2 tag id 1 system memory user memory l 62 63 61 60 59 58 57 56 55 54 l password - write password - read 31 30 29 0 1 2 30 29 0 1 2 31 bit position bit position user data block0/page0 user data block1/page0 user data block2/page0 user data block3/page0 user data block4/page1 user data block5/page1 user data block6/page1 user data block7/page1 user data block31/page7 user data block30/page7 user data block29/page7 : l l l l l l : l l l l l user data block28/page7 user data block27/page6 l l l l lock bits 5 4681c?rfid?09/05 ata5558 [preliminary] a valid write command can be used for programming a data block of 33 bits ? including the associated lock bit ? into an addressed location of either memory section. once locked (lock bit = 1), the entire block including the lock bit itself can no longer be reprogrammed selectively. the system memory section is situated at the upper end of the (6-bit) memory address range and contains all system parameter s and configuration settings. this area has restricted access (see figure 2-5 on page 7 ) and the majority of blocks can only be read or written after the suc- cessful execution of the appropriate password login command (see table 7-1 on page 24 ). all the configuration settings are allocated in block 63 (see figure 2-7 on page 9 ) and the pass- word protection security information in block 62 (see figure 2-6 on page 7 ). 2.6.2 traceability data the traceability information is programmed and locked into the traceability blocks (59-61) by atmel during the production test. figure 2-4. tag id and traceability structure ic code 4-digit atmel ic reference number, e.g. ?5558? acl allocation class as defined in iso/iec tdr 15963-1 = e0h mfc manufacturer code of atmel corp. as defined in iso/iec 7816-6/am1 = 15h icr 4-bit atmel ic revision code dpw 18-bit binary encoded die on wafer wafer# 5-bit binary wafer number lot id 9-digit lot number rfu reserved for future use 7 ............. 0 15 ......... 8 31 ................................. 16 7... 4 30 .............. 26 3 ... 0 25 ........................ 8 15 ..................... 0 31 ................... 16 tagid tagid(msb)...........tagid(msb-16) tagid(msb-17)........tagid(msb-31) block 57 block 56 anticollison detection starts with this bit block 58 traceability mfc icr block 60 block 59 acl lotid die on wafer 18 bit wafer # 5bit tagid(msb-49)........tagid(msb-63) tagid(msb-32).......tagid(msb-48) tagid(msb-80)........tagid(msb-95) tagid(msb-64).......tagid(msb-79) ic code rfu block 61 lotid 31 6 4681c?rfid?09/05 ata5558 [preliminary] the blocks 59, 60 and 61 contain atmel?s manufacturer?s serial number (msn). the top 4 digits of block 61 specifiy the ic code of this product. the following byte of block 61 is fixed to e0h which is the allocation class (acl) for registered ic manufacturers as defined in tdr 15963-1; followed by the manufacturer code (mfc), which compliant with iso/iec 7816-6/am1, is defined as 15h for atmel. the remaining two blocks cont ain a 64-bit atmel unique traceability code. the data is divided in several sub-groups, a 36-bit lot id code, a 5-bit wafer number and a 18-bit sequential die number which represents the physical location of the chip on the processed wafer. the icr nibble (4 bits) of this manufacturer serial number (msn) is used for the ic refer- ence/version (icr). the unique tag identifier (tag id) blocks provi de an address code with which each tag can be individually identified and interrogated. these codes are programmed by either the tag system administrator or the tag manufacturer into blocks 56 to 58. the allocation of individual identifica- tion codes must be handled so that an interrogator can never be confronted with two tags with identical tag ids. this is an important issue as the tag id is used as the basis for accessing and sorting tags during anticollision commands getid , select and selectgroup . the atmel traceability code (block s 60 and 59) itself provides a means of unique ch ip identifica- tion so that this data content can be used as the tag id or a part of the tag id by copying it or part of it into blocks 56 and 57. the tag id code is located in blocks 56 to 58. it is msb aligned so that it may occupy between 16 and 96 bits (see figure 2-4 on page 5 ). this tag id length is set in the configuration block (see figure 2-7 on page 9 ) and has an impact on the time re quired to complete the anticollision detection loop so it should be adjusted to suit system requirements. the default preprogrammed tag id length is 64 bits. the anticollision algorithm is based on a bit by bit bi nary tree elimination, carried out in parallel on all the tag ids within the interrogator field. this starts with the msb of the tag id (always in bit position 31 of block 56) and continues through to bit position 0 of block 58 or until the tag id lsb, indicated by the configuration tag id length, is reached. 2.7 security levels the ata5558 has three levels of security. firs tly, the restricted password access which pre- vents unauthorized access to both user and system data but allows authorized access using the correct password. then a block orientated absolut e write lock protection (lock bits) and finally the master key with a security code which has to be set in the configuration block accordingly (see table 2-2 on page 8 and figure 2-7 on page 9 ). 2.7.1 password protection the user memory is subdivided into continuous page areas which can be configured so that write or read/write and write operations on blocks within these pages can only be carried out after the appropriate password has been transmitted to the tag (loginread or loginwrite com- mand). the read and write password protections are independent and user definable. the read and write passwords are found in blocks 54 and 55 and the page security levels are defined in the page security register of block 62 (see figure 2-6 on page 7 ). 7 4681c?rfid?09/05 ata5558 [preliminary] to access a protected memory block, a login command with the corresponding read or write password had to be executed once per session. during the login procedure the 32-bit password field of the login command is compared with t he contents of the corresponding password in the system memory. if the passwords match, the ata5558 tag will re turn an sof pattern as an acknowledge signal. if they do not match, the tag will respond with an sof followed by the appropriate error code. writing to a protected memory address which has not been enabled with the correct loginwrite password, will result in an error code on completion of the interrogator command. reading a password protected memory address which has not been enabled with the correct loginread password, returns a block of all 0 data and no error code. figure 2-5. system memory access figure 2-6. page security register 2.7.2 lock bit each memory block, consists of 32 data bits and an associated lock bit (see figure 2-3 on page 4 ). once a block is locked (lock bit = 1 ), the entire block including the lock bit itself can no longer be reprogrammed configuration page security traceability 3 traceability 2 traceability 1 tag id 3 tag id 2 tag id 1 password - write password - read 62 63 61 60 59 58 57 56 55 54 configuration page security traceability 3 traceability 2 traceability 1 tag id 3 tag id 2 tag id 1 password - write password - read block name block name block name unlimited access password access no access read access write access l 3210 7654 15 14 13 12 19 18 17 16 23 22 21 20 11 10 9 8 27 26 25 24 31 30 29 28 p4a p3a p4b p0b p2b p2a p3b p7a p7b p6a p6b p5a p5b p1a p1b p0a reserved page 7 page 6 page 5 page 4 page 0 page 1 page 2 page 3 page security data password required for write read p x a p x b 00 10 01 1 1 reserved reserved no yes yes no no yes code msb............. ...........lsb 8 4681c?rfid?09/05 ata5558 [preliminary] 2.7.3 master key the master key controls various operating modes as described in table 2-2 . for production test purposes, other master key codes are used, bu t once the configuration block has been double locked these test functions can never be reactivated. if the master key is set to 0110 , the blocks within the system memory section have different access protection (see figure 2-5 on page 7 ). these access rights are fixed and not influenced by the page security register. access to pa ssword protected system memory blocks can only be performed after the corresponding loginwrite or loginread has been successfully executed. the password blocks themselves are non-readable. traceability an d configuration can always be read but the traceability data cannot be altered. a new ata5558 device, when received by the customer can be considered as being unpro- grammed (all 0 state), the only exception to this being the preprogrammed non-alterable traceability information. for the tag manufacturer to be able to easily set up the tag passwords, it is possible to provisionally switch the password protection off. i.e master key = 0 . in this state, it is possible to read and write all non-locked (lock bits = 0 ) memory blocks irrespective of the page security. in this way, new tag passwords or tag id?s can be defin ed and written. blocks, which have once been locked (block lock bit = 1 ) can however not be rewritten. when the cus- tomer has completed the tag configuration, the master key is set to the ?safe? state (= 6) thus enabling the full password protection, and then finally the configuration block itself may be locked. in this double locked condition, the configuration and all other locked blocks are irrevers- ibly set and cannot be changed. this applies to bot h the user and the majority of the system memory blocks. table 2-2. master key related functions master key enables protection scheme ddr pm eas user memory clear page security system memory 6 yes yes yes no yes yes 9 yes yes yes yes yes yes others no no no yes no no 9 4681c?rfid?09/05 ata5558 [preliminary] 2.8 tag configuration register the internal tag configuration register holds a s hadow copy of the configuration settings stored in the system memory?s block 63. it is refres hed after every por cycle (rf field on), reset to ready or write to block 63. figure 2-7. configuration register 3. transmission protocol the transmission protocol defines the mechanism to exchange commands and data between the interrogator a nd the tags. in all but the public and eas mode, the in terrogator ha s complete control over the communication flow ? all data transmission being synchronized to interrogator commands and the interrogator field clock ? ?interro gator talks first? (itf) principle. this means that a tag does not transmit data, unless it has received and properly decoded an interrogator command. the protocol is based on an exchange of commands from the interrogator to the tag (downlink mode) and response from the tag to the interrogator (uplink mode) itf =interrogator talks first mode pm = public mode eas = electrical article surveillance nrz = non return to zero notes: (1) if master key = 6hex then all test modes are ignored and password protection enabled (2) if ddr = 1 and master key = 6hex or 9hex then data rate = fast, otherwise slow r = reserved for future use, should be set to 0 x = don't care state l a4 a3 p2 a2 a1 a0 rf/2(n+1) ...lsb msb... 3210 7654 15 14 13 12 19 18 17 16 23 22 21 20 11 10 9 8 27 26 25 24 31 30 29 28 1 1 0 0 0 = reserved max. block 0 = unlocked 1 = locked r r uplink data bit rate 000 001 010 011 100 101 110 111 = 16 bit = 32 bit = 48 bit = 64 bit = 80 bit = 96 bit = 40 bit = 56 bit 1 = downlink crc check mandatory tagid length downlink data rate (ddr) (2) 0 0 r 00 01 10 11 = manchester = nrz (direct coding) = fdx-b (biphase) = reserved uplink encoding sof preamble length ( bit periods ) = 1 = 2 . . = 8 000 001 ... ... 111 master key (1) lock bit p1 p0 0 n4 n3 n2 n1 n0 x0 01 11 = itf = pm = eas operating mode 10 4681c?rfid?09/05 ata5558 [preliminary] 3.1 tag to interrogator communication all transmissions from the tag to the interrogator utilize amplitude modulation (ask) of the rf carrier. this takes place by controlled switching of a resistive load between the coil pads which in turn modulates the rf field generated by the interrogator. the tag is capable of communicating with the in terrogator via inductive coupling. typical exam- ples of the incorporated amplitude modulation is shown in figure 3-1 : manchester encoded data signal bi-phase encoded data signal nrz direct data encoding dual pattern data coding is used during the an ticollision loop and for an error code response figure 3-1. tag to interrogator - load modulation coding 3.1.1 start of frame (sof) encoding after the reception of a valid in terrogator command the tag will reply immediately with a start of frame (sof) pattern. the sof pattern is made up of a variable length preamble and a fixed 2-bit (manchester) code violation followed by a ha lf bit duration of unmodulated carrier. the pre- amble length as set in the configuration block defines the number of (manchester coded) zero initialization data bits. if the preamble length in the configuration register is set to zero, a single start bit will precede on the code violation. nrz data anticollision dual pattern data coding load on load off t d load on load off t d t d t d normal manchester data coding load on load off t d load on load off t d normal biphase data coding load on t d or load off load on load off load on load off t d or data "1" data "0" 11 4681c?rfid?09/05 ata5558 [preliminary] figure 3-2. sof pattern 3.1.2 public mode 1. in public mode the cyclic data stream will be preceded by a single sof patter n after the completion of the por delay. 2. the variable number of preamble data bits is aimed at easing the interrogator design and optimizing system performance. 3. within any closed identification system the preamble length for all tags must be identical. 3.2 interrogator to tag communication all commands and data bit streams from the interrogator to the tag are 100% (ook ? on-off-key) modulated using a modified 1 out of 4 pulse position coding. depending on the data, the continuous rf field is interspersed with short field gap s of constant duration and vari- able separation. the time from one gap to the next may take on one of four discrete values. each of these represent one of four possible dual bit downlink data codes ( 00 .. 11 ) in the data stream (see figure 3-3 ). the downlink data transfer speed is dependent on the downlink data rate (ddr) bit set in the tag configuration block, so that selected tags can always understand the interrogator. the minimum write data coding (maximum data rate) is 9 field clocks. this corre- sponds with the d 00 (d ref ) parameter in figure 3-3 and table 3-1 on page 12 . figure 3-3. interrogator to tag - modified 1 out of 4 pulse position coding sof 2 bit period code violation example with p = 4 bit periods preamble length = 3 w gap s gap downlink mode uplink mode d 00 d ref d 01 d 11 d 10 12 4681c?rfid?09/05 ata5558 [preliminary] 3.2.1 start gap the first command gap is usually slighty longer (~20 field clocks) than the following data gaps. this is referred to as the start gap. all interrogator to tag commands are initiated by such a start gap. as soon as the clock extractor detects a st art gap, the tag?s receive damping is switched on. this serves to improve the gap detection of all following data gaps. a start gap can be detected at any time after the completion of the tag?s power on reset delay sequence (rf field-on plus ~3 ms). if a gap is received during this delay sequence, irrespective of whether it is part of a command or a start gap, the delay will restarted. commands or partial command sequences occurring during the powe r on reset sequence will not executed. 3.2.2 4ppm command encoding the timing between data gaps depends on the downlink data rate (ddr) in the configuration register and is nominally 9 or 13 field clocks for a 00 , 17 or 29 field clocks for a 01 , 25 or 46 field clocks for a 10 and 33 or 61 field clocks for a 11 . the duration of the field gaps themselves lie between 8 and 20 field clocks. should no ga p be detected for more than the maximum 11 gap separation (see table 3-1 ), the tag(s) will terminate the present command decoding mode and, if enabled release the receive damping. if an error is detected within the command sequence (e.g. incorrect number of bits received, crc check failed etc.) th e tag will return a dual pattern coded error to the interrogator and ignore the command. the first two bits of every command constitute the start of command (soc) and is always 00 . this soc is used as a timing reference for all following data (see table 3-1 ), thus providing an auto-adjustment to allow for varying environ- mental conditions. table 3-1. modified pulse position modulation - timing parameters parameter remark symbol ddr = 1 and master key = 6 or 9 ddr = 0 or master key 6 or 9 unit min. typ. max. min. typ. max. start gap s gap 81050 8 1050t c write gap w gap 81020 8 1020t c write data coding (gap separation) reference data 00 d ref 9?6813?72t c 00 data d 00 d ref ? 3 d ref d ref + 4 d ref ? 7 d ref d ref + 8 t c 01 data d 01 d ref + 5 d ref + 8 d ref + 12 d ref + 9 d ref + 16 d ref + 24 t c 10 data d 10 d ref + 13 d ref + 16 d ref + 20 d ref + 25 d ref + 32 d ref + 40 t c 11 data d 11 d ref + 21 d ref + 24 d ref + 28 d ref + 41 d ref + 48 d ref + 56 t c notes: 1. all absolute times assume t c = 1/f c = 8 s (f c = 125 khz) 2. all the above timing data is that which should appear on the device terminals so that the device can operate correctly. depending on the coil used (e.g. q factor etc.) and the transmission medium, the va lues implemented in the interrogator could after slightly. 13 4681c?rfid?09/05 ata5558 [preliminary] figure 3-4. command ?read block #23? figure 3-5. command ?write block #12? c r c - 1 6 tag reply s gap cmd block addr 32 bit data 01 01 11 sof no modulation 00 01 interrogator command "read single block 23" crc - 16 t a g r e p l y interrogator command "write single block 12" s gap cmd block addr 00 11 00 n o m o d u l a t i o n 00 01 01 11 10 32 bits data bit31 bit30 bit1 bit0 lock bit 11 00 00 program delay ( 5 ms) 14 4681c?rfid?09/05 ata5558 [preliminary] 4. crc error checking the crc error checking circuitry generates a 16-bit crc to ensure the integrity of transmitted and received data packets. the ata5558 uses the crc-ccitt (consultative committee for international telegraph and telephone) for error detection. the 16 bit cyclic redundancy code is calculated using the following poly nomial with an in itial value of 0x0000 : the implemented version of the crc ch eck has the following characteristics: reverse crc-ccitt 16 as described in iso/iec 11785 the crc 16-bit shift register is initialized to all zeros at the beginning of a command the incoming data bits are xor-ed with the msb of the crc register and is shifted into the register?s lsb after all data bits have been processed, the crc regist er contains the crc-16 code. reversibility - the original data together with asso ciated crc, when fed back into the same crc generator will regen erate the initial value (all zero?s). should a crc be required, both the tag and interrogator must use the above crc polynomial. during read/write operations, a crc can be attach ed to information by either the interrogator and/or the tag in the case of downlink commun ication, a crc (crc_d) can be attached to information trans- mitted from the interrogator to the tag(s) (see figure 4-2 on page 15 ). this is evaluated by the tag(s) to ensure correct transmission. during the uplink phase of the read commands the tag replies with the requested data block(s) followed by an uplink crc (crc_u). this crc_u is generated in the tag?s crc generator, from the downlink address, crc_d (if used) and the returned data (see figure 4-3 on page 16 a, b, c). so by initializing the interrogator?s crc generator with the same address and crc_d (if used), then subsequently updating it with the returned data and uplink crc_u, the integrity of both the address understood by the tag and data itself can be verified. on receiving a response from the tag which includes a crc_u, it is recommended that the interrogator verifies this. if it is found to be incorrect, the interrogator should take the appropriate actions. these actions are left to the discretion of the system designer. during the anticollision detection, the crc can also be used as a means of tag identification. a tag which is successfully se lected by one of the select commands or as the result of an anticolli- sion elimination cycle, will always reply with a crc . this is generated from it?s own tag id (see figure 4-3 on page 16 d) and is always preceded by an sof pattern. this also provides an addi- tional means of double checking whether the intended tag has been selected. for any write command, if the bit 10 of the configuration register = 1 , the usage of the crc for this communication is mandatory. failure to include or verify a crc results in the tag aborting the command execution and returning an error code . if the configuration register bit 10 = 0 , the write crc usage is optional. in this case, th e crc is handled in the same manner as a read command i.e. the crc is only evaluated if attach ed. should no crc be transmitted and the con- figuration register bit 10 = 0 , then the command will always be executed. p(x) x 16 x 12 x 5 x 0 +++ = 15 4681c?rfid?09/05 ata5558 [preliminary] figure 4-1. schematic diagram of crc generation figure 4-2. examples of downlink crc generation p (x) = x0 x1 x2 x3 x4 x5 x6 x7 x8 x9 x10 x11 x12 x13 x14 x15 msb data in lsb (a) read multiple blocks (b) read single block (c) write 1 1 0 0 1 0 address 0 1 1 0 0 0 data (32 bits) 1 0 start address 1 1 1 1 0 1 lsb ........... msb lsb .......... msb interrogator crc generator after 12 shift operations lsb .............................................. msb end address (1f hex) (06 hex) address interrogator crc generator after 6 shift operations lsb .................................................. msb lsb .............. msb (06 hex) 0 1 1 0 0 0 crc_d = 4167hex crc_d = 60c6hex lock bit (locked) lsb .............. msb interrogator crc generator after 40 shift operations lsb .................................................. msb crc_d = 25ef hex (5000 0006 hex) 0 0 0 0 1 0 1 0 0 1 1 0 0 0 0 0 lsb .................................................. msb (13 hex) 0 1 1 0 1 1 1 0 1 0 0 0 0 0 1 0 0 1 1 0 0 0 1 1 0 0 0 0 0 1 1 0 1 1 1 1 0 1 1 1 1 0 1 0 0 1 0 0 data from interrogator crc generator tag or interrogator 16 4681c?rfid?09/05 ata5558 [preliminary] figure 4-3. examples of uplink crc generation 1100 0100 1000 0000 (a) read multiple blocks using downlink crc (b) read single block without downlink crc 0 1 1 0 0 0 start address 1 1 1 0 0 0 lsb ........... msb lsb .......... msb tag crc generator after 92 shift operations lsb ................................................ msb end address (07hex) (06hex) address tag crc generator after 38 shift operations lsb .................................................. msb lsb ............ msb (06hex) 0 1 1 0 0 0 crc_u = a955hex crc_u = 6285hex 1 0 1 0 1 0 1 0 1 0 0 1 0 1 0 1 1 0 1 0 0 0 0 1 0 1 0 0 0 1 1 0 (d25e hex) 0 1 1 1 1 0 1 0 0 1 0 0 1 0 1 1 crc_d from interrogator 1110 0110 1010 0010 1100 0100 1000 0000 (0123 4567 hex) data from address 06h (89abcdef hex) data from address 07h 0000 0000 0000 0000 0011 0011 0011 0011 (cccc 0000hex) data from address 06h (c) read single block with downlink crc lsb ............................................................... msb lsb .......................................... msb lsb .................................................................... msb lsb ............................................... .................... msb 1 0 1 0 1 0 start address lsb ........... msb tag crc generator after 54 shift operations lsb .................................................. msb (15hex) crc_u = 039ahex 0 1 0 1 1 0 0 1 1 1 0 0 0 0 0 0 (4294 hex) 0 0 1 0 1 0 0 1 0 1 0 0 0 0 1 0 crc_d from interrogator 1010 1010 1010 1010 0101 0101 0101 0101 (aaaa 5555 hex) data from address 07h lsb .......................................... msb lsb .............................................................. msb (d) select tag (16 bit tagid) tag crc generator after 16 shift operations lsb ................................................. msb crc_u = 2730hex 0 0 0 0 1 1 0 0 1 1 1 0 0 1 0 0 ( 0123hex) tagid lsb ........................msb 1111 0111 1011 0011 1101 0101 1001 0001 data from tag data from interrogator crc generator tag or interrogator 17 4681c?rfid?09/05 ata5558 [preliminary] 5. operating modes after initialization, the operating mode (configura tion block bits 23 and 24) is interrogated and depending on it?s state, the devi ce will go into either the ready state of the ?int errogator talks first? (itf) mode or the public mode?s pm ready state if the pm bit is set or the ?electronic article surveillance? ( eas) mode is selected. 5.1 interrogator talks first mode (itf) for multi-tag applications, the ata5558 is used in the ?interrogator talks first? (itf) mode with anticollision handling capability. in this mode, the tag starts up in the ready state, where it remains silent and waits for further interrogator commands before communication can take place. 5.2 tag state machine any tag can find itself in one of the following states: power down pm ready (for pm or eas modes only) ready (itf mode) selected quiet in the state diagram shown in figure 5-1 on page 18 , a state transition takes place by applying or removing the field (power on/off) or via one of the commands select, selectall, selectgroup, resetselected or resettoready. when a tag is unable to decode or process an interrogator command (e.g. crc or bit frame error), it will re main in the current st ate. depending on the state, tag(s) will only a ccept certain commands. 5.3 power down state the tag is in the power down state when there is not enough energy in the interrogator field to activate the tag. the ata5558 commences a powe r-on initialization delay with an activated weak damping level to achieve a field strength threshold for stable operation. 5.4 ready state (itf) the ata5558 tag enters the ready state after it has been activated by the interrogator (rf-field on) or after receiving either a resettoready or resetselected command (the eas and pm deactivated). the ready state is the initial anticollision state, and in general all tags on this state are unidentified. 5.5 selected state before a tag can in any way be accessed, it must first be selected. tag selection can take place individually in which case they find themselves within the selected state. they can enter the selected state as a result of receiving an explicit select command with the matching tag id. in this way, only one tag can theoretically be in the selected state at any one time. if a tag should find itself in the selected state and a second tag is selected by a subsequent select command, the first tag will automatically proceed into th e quiet state. 18 4681c?rfid?09/05 ata5558 [preliminary] it is possible to carry out commands simultaneously on more than one tag. to do this they must all first be selected by specifying a group of tags within the ready state and putting the group into the selected state. this is performed by using a selectgroup command with a matching partial tag id pattern. a group of tags in t he selected state may be written simultaneously with identical blocks of data. data verification and checksum errors are reported by the tags using a special dual pattern code. tags within the selected state will automatically drop into the quiet state and be excluded from subsequent anticollision detection, if a subsequent select or getid command is received. selection can also take place on tag groups with non-matching tag id patterns using the select- ngroup command. this could be useful for example, to check a storage crate for items which do not match a certain selection criteria (e.g. color or dispatch destination), so a selectngroup command with the tag id mask set to the color black will groupselect all non-black items. if no tag responds with a sof pattern, then there are no black items present. figure 5-1. tag state diagram select, groupselect or getid opcode getid select or groupselect with matching tagid or selectall tagid identified implicit state change command initated state transition arbitration lost/ tagid eliminated quiet selected anticollision detection loop resettoready pm ready (continuous data transmission) power on (pm or eas only) power on (itfmode ) power down resettoready or invalid command (pm or eas only) start gap read/write/login resettoready, reset selected ready (itf mode ) all sucessfull select commands 19 4681c?rfid?09/05 ata5558 [preliminary] 5.6 quiet state the tag goes into the quiet state from the selected state when a new selection takes place i.e. a select or a getid command is received. unlike the ready state, the tag?s tag id in this state is known. tags in the quiet st ate are excluded from subseq uent anticollision detection. 5.7 public mode (pm) and pm ready state in the public mode, communication commences with a single ?start of frame? pattern (sof), fol- lowed by a continuous stream of serialized user data which is read cyclically from the user memory. this starts with block 0, bit 31 and c ontinues sequentially through to bit 0 of the final block address defined by the configuration parameter m axblock. after reaching the max- block address, data transmission repeats with block 0, bit 31. if, for example maxblock were set to 1 , block 0 and 1 would be continuously transmitt ed. this transmission process con- tinues indefinitely until terminated by either switching the field off or on the receipt of a valid interrogator command. on the start of a new command the tag will proc eed temporarily from th e pm ready state into the (itf) ready state. if the comm and is valid, it will be executed and the tag state changes as if in the itf mode (see figure 5-1 on page 18 ). if the command is invalid, then it will drop back into the pm ready state and continue to transmit data. to restart the public mode transmis- sion, the tag must be re-initialized by reappl ying the field (por) or by using a resettoready command. figure 5-2. public mode start up 5.8 electronic article surveillance (eas) the eas mode is intended for retail article surveillance wher eby the device will be physically attached to retail articles in a store or supermarket. the device will be preprogrammed into an ?unpaid state? before entering the sale s area by programmi ng the block 0 to maxblock of the user memory to all 0s . for convenience reasons m axblock should be set to 0 in the configu- ration word. to increase security, the memory pages containing block 0 to maxblock should be assigned a write password security level (see password protection). once the article has been purchased at the cash desk, the device is programmed into a ?paid state? by writing the block 0 with all 1 s, using the appropriate password (if necessary). as soon as an ?unpaid? device enters an interr ogator field, it will modulate the interr ogator field with an rf/2 signal. this can be detected by the surveillanc e interrogator and used to trigger an app ropriate audio or visual warning. a ?paid? device w ill remain silent. as in the public mode, the device will revert to itf mode ready state as soon as it receives a valid interrogator command. by reapplying the field (por) or using a resettoready command, the device returns to eas mode. por por initialisation delay start of frame (sof) data block 0 check operating mode (= pm) 100110 0 31 30 25 26 27 28 29 bit position data block (maxblock ) example data values 10011 43 0 1 2 100110 31 30 26 27 28 29 continue from data block 0 20 4681c?rfid?09/05 ata5558 [preliminary] figure 5-3. eas startup 6. anticollision protocol the aim of the anticollision prot ocol and associated arbitration process is to detect and identify the tag id?s of all tags within the ready state wh ich are present within range of the interrogator field. the interrogator masters all communication with single or multiple tags. tag arbitration commu- nication is initiated by issuin g the getid command. all tags in the ready stat e will then enter the anticollision detection loop and synchronously start to trans mit an identification response that represents the tag?s individual unique tag id code. using an iterative bit-wise sorting algo- rithm on these tag id?s, the interrogator is capable of eliminating all but one tag. this remaining tag is thus selected and can be accessed dire ctly by following commands. tags eliminated dur- ing the detection loop are muted, drop back into the ready state to participate in the next detection cycle. a typical anticollision procedure is illustrated in the following scheme: a) the interrogator starts the anticollisio n detection by sending a getid command. any previously eliminated and muted tag will be put into the re ady state. all tags in the ready state participate initially in the antico llision detection loop. if nothing is known of the tag id?s within range, then the getid command includes no further parameters and the detection group encompasses all tags. after a predefined number of field clock cycles, all tags within range repl y by synchronously transmitting a sof pattern followed by their own respective tag id(msb). anticollision detection can be redu ced to a subgroup of tags by passing a partial tag id pat- tern as tag id command parameter. these bits represent the most signi ficant bits of the tag id subgroup. anticollision dete ction will then be carried out on this subgro up, continuing as above with the synchronous reply from all c onstituent tags, followed by their most signifi- cant unknown tag id bit(s). "unpaid" device (block 0 = all '0's) por por initialisation delay check operating mode (= eas) "paid" device (block 0 = all '1's) por por initialisation delay check operating mode (= eas) 21 4681c?rfid?09/05 ata5558 [preliminary] b) the interrogator can detect whether any tag is present. if no sof pattern is returned then there is no tag present within the detection group so the process continues with (a). c) the interrogator checks the tag responses bit-wise wi thin the anticollision loop. if one or more active tags are within range, the inte rrogator will se quentially scan the tag id bits from the most significant through to the le ast significant bits. each time slot corresponds to a particular tag id bit position. all tags re ply simultaneously with dual pattern modulated data, the response signals being superimposed on one another. a damped signal will thus overwrite a non-damped signal so that a logical 1 tag id bit will prevail over a logical 0 bit. d) the interrogator checks and eliminates tags. if the interrogator detects a tag id logical 1 bit, it acknowledges reception by broadcasting a gap in the field signal. this can be monitored and evaluated by all tags within the detection group. otherwise a tag id logical 0 bit induces no reaction from the interrogator. on observing an acknowledge gap, any individual tag can, by checking the state of it?s own current tag id bit, deduce whether it should remain in the current ant icollision detection loop (tag id bit = 1 ) or whether it should eliminate itself from the detection group (tag id bit = 0 ). eliminated tags will be mu ted and fall back into the ready state wher e they take no further part in the current detection loop . they remain in this state unt il the next anticollision loop is started by a new getid command. continue to (a) non eliminated tags remain in the detection loop and if the final tag id bit has not been reached then the next tag id bit is interrogated in (c) otherwise (e). e) end of a single anticollision loop by the time the final tag id bit has been interr ogated, there will be only one re maining active tag within range ? all others having been eliminated during the previous interactions. assuming no new tags have enter ed the interrogation since the start of the anticollision loop and that all the signals have been correctly interpreted, the interrogator should at this stage be able to identify the associated tag id. this active tag is set automatically into the selected state and replies with the anticollision response whic h consists of an sof followed a 16 bit crc generated from it?s own tag id. if the received crc matches the tag id the interrogator may continue with (a) or (f). if the received crc is corrupted or does not match the calculated 16 bit value the interroga- tor will issue a resetselected comma nd to transfer this improperly selected tag back into the ready state. continue to (a). f) the interrogator communicates directly with tag in selected state. at this stage the single identified and selected tag can undergo direct communication with the interrogator and can be read and written with either read, write or login commands. this tag remains selected until the interrogator starts a new anticollision loop with a new getid command, or if other tags are addressed directly using a select or groupselect com- mand. the selected tag then drops into the quiet state where it is excluded from all future anticollision detection l oops. continue to (a). 22 4681c?rfid?09/05 ata5558 [preliminary] figure 6-1. anticollision loop transmit sof gap? x = x + 1 (next bit) last tagid bit? select state transmit tagid(x) tagid(x) = 0? ready state getid command? x = x + 1 (next bit) last tagid bit? selected tagid found y interrogator (single master) start start sof? (tag present?) tagid(x)=1? transmit gap (acknowledge) selected tagid(x) = 1 selected tagid(x) = 0 transmit sof + crc of selected tag y selected crc correct? detection error tag (one of many slaves) n y no tag n parameters received? n transmit getid command/ parameters y n y y n select subgroup x = n y n n n n y n y n tagid(x) = 1? partial tagid transmit getid command y y getid command mask bit parameters sof tagid(x)bit gap sof + crc 23 4681c?rfid?09/05 ata5558 [preliminary] figure 6-2. getid command with partially known tag id figure 6-3. subsequent tag responses in anticollision loop (two alternative tag ids) t ir s gap soc a 2 3 getid t tag 00 10 11 00 00 10 00 10 00 even interrogator command getid (tagidpart = "a23") tag response for tagid's "a232" or "a233" subsequent tagid bits interrogator acknowledge gap t tag t tag '0' '0' '1' 2 bit period 2 bit period 2 bit period anticollision response from all tags. sof sof final tagid bit 2 bit period sof t tag '0' '1' '1' '1' '0' '0' '1' '1' '0' t 0 final tagid bit '1' interrogator acknowledge gap 2 bit period sof alternative a (tagid = "a233") alternative b (tagid = "a232") anticollision response from all tags with '1' in current tagid position (tagid = a233 and/or a232) anticollision response from remaining tag with '1' in last tagid position (tagid = a233) final tag response for tagid "a233" + crc anticollision response from remaining tag with '1' in last tagid position (tagid = a232) final tag response for tagid "a232" + crc '0' t tag '0' '0' '1' '1' '0' '1' '1' '1' '0' 16 bit manchester coded crc (= "6d0d" ) 16 bit manchester coded crc (= "7d2c" ) t 1 t tag 24 4681c?rfid?09/05 ata5558 [preliminary] 7. command set the first two bits of any interrogator command are called start of command (soc) and are always 00 . this pulse interval is used for auto calibration purposes. the following series of dual bit packets define the interrogator command opcodes and the command dependant parameter information. a command overview is given in table 7-1 below table 6-1. anti-collision timing parameter remark symbol formula t bit =f c /32 unit tag reaction time end of start gap to start of tag command processing t ir 0t c tag to interrogator response time end of final command gap to start of tag sof acknowledge t ta g d 11 max + 1? t bit (see figure 4-1 on page 15 ) ddr = 1 84 t c ddr = 0 116 t c end of anticollision loop to start of sof (and crc) response final bit of tag id = 0 t 0 2 t c + 1? t bit 50 t c final bit of tag id = 1 t 1 = t ta g ddr = 1 84 t c ddr = 0 116 t c note: in the above example the following is assumed: f c = 125 khz; t c = 1/f c = 8 s and a data rate of f c /32; so a bit period t bit = 32 t c table 7-1. list of ata5558 supported commands command soc opcode number of parameter bits description read single block 00 01 6 (+ 16 crc_d) read single 32 bit data block and crc_u (+ optional downlink crc_d) read multiple blocks 00 01 12 (+ 16 crc_d) read multiple data blocks and crc_u (+ optional downlink crc_d) write single block 00 01 40 (+ 16 crc_d) write a single block (+ optional downlink crc_d) login write 00 01 11 01 11 10 32 login for write pwd protected access login read 00 01 11 01 10 10 32 login for read pwd protected access getid 00 00 00 none starts a complete new anticollision loop getid (tag id-part, even) 00 00 00 length of partial tag id anticollision loop with partial tag id, with even number of matching tag id bits. getid (tag id-part, odd) 00 00 1 length of partial tag id anticollision loop with partial tag id, with odd number of matching tag id bits. select (tag id) 00 00 00 length of tag id puts specif ied tag into selected state selectall 00 10 00 none selects all tags in the rf field selectgroup 00 10 0[0]n 1 length of tag id mask select a specific group of tags selectngroup 00 10 1[0]n 1 length of tag id mask select all tags which are not members of the specified group resetselected 00 11 10 00 00 none reset selected tag to ready state without reloading configuration register resettoready 00 11 00 00 00 none reset all tags in the rf field to ready state and reload configuration register from system memory (block #63) armclear 00 11 00 10 00 6 0 arms tag for clearall command clearall 00 01 01 11 11 34 0 (+ 16 crc_d) clears memory except traceability data (with optional constant crc_d = 96adh) 25 4681c?rfid?09/05 ata5558 [preliminary] figure 7-1. command format read multiple blocks read single block write single block xx xx xx addr 01 cmd 01 cmd 01 cmd xx xx xx start addr xxxxxx xx xx xx addr 31............0 data bits 0l getid (even partial tagid) 0 n length(tagid) where n : even 00 cmd tagid[msb],tagid[msb-1]..tagid[msb-(n-1)] partial_tagid 00 cmd getid (odd partial tagid) 0 n length(tagid)-1 where n : odd lock 00 selectgroup m+n: even 0 m+n length(tagid) odd selectngroup m+n: even 0 m+n length(tagid) 00 00 00 00 00 command ok response error response 10 00 10 00 0 [(0) m 1] tagid(msb-m) ... tagid(msb-m-n) 1 [(0) m 1] tagid(msb-m) ... tagid(msb-m-n) sof sof anticollision response sof crc_u sof sof data crc_u sof data partial_tagid crc_d selectcrc crc(tagid) 01 00 select 00 00 tagid 00 00 sof crc_u 1 tagid[msb],tagid[msb-1]...tagid[msb-(n-1)] crc_d crc_d sof error code dual pattern sof error code dual pattern sof error code dual pattern sof error code dual pattern sof error code dual pattern none none none none none getid end addr sof sof error code dual pattern 00 00 select all 10 00 cmd 00 00 cmd cmd anticollision response anticollision response fn (start addr,end addr) fn (start addr,end addr,(crc_d),data fn (addr) fn (addr,data,(crc_d)) fn (addr,lock,data) variable length mask positioning pattern (1) variable length (n) tagid select pattern (2) note: 1. the leftmost position of the tagid select ma sk is determined by m '0' bits followed by a single '1' bit. these bit positions can be regarded as don't care bit positions. note: 2. the tagid select mask is a variable (n) bits long. it starts immediately after the positioning pattern and can be terminated as required with the end of the command. all tagid lsb bits not defined are don't care. fn (tagid) variable length mask positioning pattern (1) variable length (n) tagid select pattern (2) even 26 4681c?rfid?09/05 ata5558 [preliminary] figure 7-2. command format (continued) 7.1 error response if a command sequence is in any case invalid, the tag answers immediately with one of the error codes (see table 7-2 ). this is made up of an sof pattern followed by a 4-bit dual pattern coded data word. command ok response error response armclear sof sof error code dual pattern sof sof error code dual pattern 1111 00 clearall 0 1 01 cmd 0 0......0 0 32 '0' data bits 00 crc_d constant crc (96adh) sof login read 01 11 10 read pwd addr 01 cmd pwd(31)...pwd(0) read pwd 10 00 login write 01 11 11 write pwd addr 01 cmd pwd(31)...pwd(0) w r i t e p w d 1 0 00 resettoready sof sof error code dual pattern sof error code dual pattern sof sof error code dual pattern sof sof error code dual pattern 11 cmd 0000 00 reset selected 10 11 cmd 0000 00 00 11 cmd 1000 00 10 0000 00 table 7-2. error codes error code description 0 1 1 1 command format error ? incorrect number of bits 1 1 1 0 corrupt command (1 out of 4) encoding 0 0 1 0 attempt to write a locked block ? write command aborted 0 1 0 0 attempt to write a protected block without a login ? write command aborted 1 0 0 0 login/write command format error 1 1 0 1 incorrect login password 1 0 1 1 crc error in command stream ? command aborted 1 0 1 0 program 0 verification error ? unreliable zero level (degraded data retention) 0 1 1 0 program 1 verification error ? unreliable one level (degraded data retention) others reserved for future use 27 4681c?rfid?09/05 ata5558 [preliminary] 7.2 read single block a read single block command is executed on a tag in the selected state. it serially reads a complete 32-bit tag data block. a downlink crc (crc_d) can be optionally included. this acts as a check for the block address. if included, the tag will alwa ys check the crc_d and abort the command if it not compatib le with the received a ddress. if omitted, the tag will perform no down- link crc check. the tag responds to a single block read command with the requested 32-bit data block which is always followed by a 16-bit upli nk crc (crc_u) to ensure data and address integrity. a read protected or non-existent memory block will return a block of 1 data bits (ffff ffff). a suc- cessful execution of a loginread command is necessary before reading a protected memory block. it should be noted that the 16-bit crc_u is generated from both the block address parameter and retrieved data. so that it acts as a check for the complete command transaction. from the received crc_u, the interrogator can ensure that the data is correct and that it was read from the correct requested block address. note: 1. optional 7.3 read multiple blocks a read multiple blocks command is executed on a tag in the selected state. it serially reads an array of consecutive 32-bit tag data blocks from a start address through to and including an end address. a downlink crc (crc_d) can be optionally included. this acts as a check for both block address parameters. if included the tag will always check the crc_d and abort the com- mand if it is not compatible with the received addresses. if omitted, the tag will perform no downlink crc check. the tag responds to a read command with the requested 32-bit data blocks which are always followed by a single 16-bit uplink crc (crc_u) to ensure data and address integrity. a read protected or non-existent memory block will return a block of 1 data bits (ffff ffff). a suc- cessful execution of a loginread command is necessary before reading a memory array including protected memory blocks. it should be noted that the 16 bit crc_u is generated from both the addres s parameters and retrieved data so that it acts as a check for the complete command transaction. from the received crc_u, the interrogator can ensure that the data is correct and that it was read from the correct requested block address range. table 7-3. interrogator command parameters command parameter 1 crc (optional) read single block = 00 01 block address crc_d (block addr) 4 bits 6 bits (msb first) 16 bits (msb first) table 7-4. tag response sof data crc start of frame data block crc_u (block addr + [crc_d (1) ] +data) 3 .. 10-bit periods 32 bits (msb first) 16 bits (msb first) 28 4681c?rfid?09/05 ata5558 [preliminary] 7.4 write single block the write single block command only effects tag(s) which have been previously been put in the selected state. it performs the programming of a specific block address with a 32-bit block of data and associated lock bit. for password prot ected memory blocks the loginwrite command has to be executed first, otherwise the progra mming will fail and an error code will be returned. memory blocks which have a 1 in the lock bit are locked and cannot be written. the command protocol includes downlink crc (crc_d) whic h is used to check the downlink address and data. this crc_d can be mandatory or optional depending on the state of bit 10 of the configu- ration register. if set to 1 , the crc_d must always be included and correct for the data programming to take place. if set to 0 , the crc_d is optional i.e. it is only checked if the crc data is present. on receiving the write command, and if necessary checking the crc_d, the tag will start the eeprom programming sequence. the maximum eeprom program time per block (including the lock bit) is 6 ms. this programming cycle in cludes an automatic read verification phase which makes sure that the data has been program med securely thus ensuring satisfactory long term data retention. to signal the completion of a successful programming cycle, the tag returns a single sof pattern. if for any reason the prog ramming of the data block fails, t he tag will generate the corresponding error code. the error code bits are dual pattern coded (see figure 3-1 on page 10 ) and pre- ceded by a sof pattern. an attempt to write to a locked block address or a downlink crc error causes an immediate abort of the programming cycle followed by the transmission of the corre- sponding error re sponse. in the case of an eeprom data verification failure, the er ror response is returned after the completion of the programming cycle. note: 1. the downlink crc (crc_d) must be appended if bit 10 of the configuration register = 1 , oth - erwise it is optional. table 7-5. interrogator command parameters command parameter 1 parameter 2 crc (optional) read = 00 01 start block address end block address crc_d (start block addr + end block addr) 4 bit 6 bits (msb first) 6 bits (msb first) 16 bits (msb first) table 7-6. tag response sof data crc start of frame multiple data blocks crc_u (start block addr + end block addr + [crc_d*] + data) 3 .. 10-bit period ((endaddr ? startaddr + 1) 32) bits (msb first) 16 bits (msb first) table 7-7. interrogator command parameters command parameter 1 parameter 2 parameter 3 crc (1) write single block = 00 01 block address 0 + lock bit write data crc_d (block addr + lock + data) 4 bits 6 bits (msb first) 2 bits 32 bits (msb first) 16 bits (msb first) 29 4681c?rfid?09/05 ata5558 [preliminary] 7.5 loginread the purpose of the loginread command is to rel ease the read protection on all read protected data blocks within the user memory. a tag in th e selected state will resp ond with a sof pattern if the transmitted read password matches the dat a stored in the tag?s system memory block 36hex (read pwd). in th e case of a non-matchi ng read password the ta g will reply with a sof pattern followed by an error code. after a successful loginread command, all read protected memory blocks may be read normally. this positive login status remains valid until a new tag is selected or the tag is reset. 7.6 loginwrite the purpose of the loginwrite command is to release the write protection on all write protected data blocks within the user memory. a tag in the selected state responds with a sof pattern if the transmitted write password ma tches the data stored in the tag?s system memory block 37hex (write pwd). in the case of a non-matching wr ite password the tag w ill reply with an sof fol- lowed by an error code. after a successful loginwrite command any write protected memory block may be modified, as long as the addresse d memory block is not already locked. the posi- tive login status is valid until a new tag is selected or the tag is reset. table 7-8. tag response sof error flags start of frame present on error only 3 .. 10-bit period 4-bit ? dual pattern code table 7-9. interrogator command parameters command parameter 1 parameter 2 parameter 3 loginread = 00 01 11 01 10 (36hex) 10 read password 4 bits 6 bits (msb first) 2 bits 32 bit (msb first) table 7-10. tag response sof error flags start of frame present on error only 3 .. 10-bit period 4-bit ? dual pattern code table 7-11. interrogator command parameters command parameter 1 parameter 2 parameter 3 loginwrite = 00 01 11 01 11 (37hex) 10 write password 4 bits 6 bits (msb first) 2 bits 32 bits (msb first) table 7-12. tag response sof error flags start of frame present on error only 3 .. 10-bit period 4-bit ? dual pattern code 30 4681c?rfid?09/05 ata5558 [preliminary] 7.7 resetselected a resetselected command will set all currently sele cted tag(s) back into the itf mode?s ready state. the tag(s) answers with a sof pattern and will be able to pa rticipate in future anticollision sequences. if either pm or eas is enabled , this command will not return a selected back into public mode ready state ,i.e., the de vice will not start to tr ansmit public mode data. 7.8 resettoready in itf mode, a resettoready command will set all t ags within range of the rf field back into the ready state. if either pm or eas is enabled, the resettorea dy will set the tag back into the pm ready state where it will start to transmit pm data. all tags will answer with the sof pattern. in ready state they can then participa te in future anti collision sequences. the resettoready command reloads the configuration register from system memory block #63. 7.9 select when receiving a select command, the addressed tag responds with the 16 bit crc of the tag id and immediately enters the selected state. after selection, the interrogator may communicate with the selected tag using any valid read, write or login commands. if the interrogator sends a new getid or select (another tag) com- mand, the currently selected tag enters the quiet state automatically. table 7-13. interrogator command command resetselected = 00 11 10 00 00 10 bits table 7-14. tag response sof start of frame 3 .. 10 bit-period table 7-15. interrogator command command resettoready = 00 11 00 00 00 10 bits table 7-16. tag response sof start of frame 3 .. 10-bit period 31 4681c?rfid?09/05 ata5558 [preliminary] 7.10 getid when receiving a general getid command, all tags in the ready state w ill enter the anticolli- sion loop and take part in the deterministic arbi tration sequence all activated tags will reply synchronously with the sa me anticollision response. this specif ic anticollision signature consists of a sof pattern followed by s ubsequent dual pattern coded t ag id bit(s) as illustrated in figure 3-1 on page 10 and figure 6-3 on page 23 . 7.11 get_id (partial tag id) any anticollision loop starts with the interrog ator?s getid command. all tags in the ready state with a matching partial tag id will reply synch ronously with their own personal anticollision response. this consists of an initial sof pattern followed by the tag id bit(s) in dual pattern coding which continue until the complete tag id has been sent or until the tag is eliminated from the search. table 7-17. interrogator command parameters command parameter select = 00 00 00 ta g i d 6 bits 32 4681c?rfid?09/05 ata5558 [preliminary] 7.12 selectall when receiving the selectall comm and, all tags in the ready stat e will enter the selected state and answer with the sof pattern. this allows the rapid global configuration and personalization of a collection of tags without having to select and program each tag sequentially. table 7-22. interrogator command parameters (odd number of (n) known tag id bits) command parameter getid (tag id) = 00 00 1 tag id[msb], tag id[msb-1],.........tag id[msb-(n-1)] 5 bits 33 4681c?rfid?09/05 ata5558 [preliminary] 7.13 selectgroup when receiving the selectgroup command, all tags in the ready state with the matching par- tial tag id will enter the selected state and answ er with the sof pattern. the partial tag id can vary in length. it?s pattern position relative to the tag id is set by the first (leftmost) 1 in the com- mand parameter. the preceeding 0 bits act solely as ?don?t care? spacer bits. this ?mask header? is not part of the actual partial tag id. the mask pattern follows the mask header and is terminated by the end of command. leading 0 don?t care mask bits + 1 = mask header (not part of partial tag id) x = don?t care mask bits example of selectgroup parameters: sample tag id 6cb9 : 01 10 11 00 10 11 10 01 the above tag id would be selected by all the following groupselect command parameters: 1) command parameter: partial tag id: 0 00 00 00 1 0 10 11 xx xx xx x0 10 11 xx xx 2) command parameter: partial tag id: 0 00 00 00 00 01 11 10 xx xx xx xx xx 11 10 xx 3) command parameter: partial tag id: 0 00 00 00 00 00 00 00 1 1 xx xx xx xx xx xx xx x1 4) command parameter: partial tag id: 1 01 10 11 00 01 10 11 00 xx xx xx table 7-26. interrogator command parameters command parameter 1 parameter 2 selectgroup = 00 10 0 mask header: 34 4681c?rfid?09/05 ata5558 [preliminary] 7.14 selectngroup when receiving the selectngroup command, all tags in the ready state which do not match the partial tag id will enter the selected state an d answer with the sof pa ttern. the partial tag id can vary length. it?s pattern position relative to the tag id is set by the first (leftmost) 1 in the command parameter. the preceeding 0 bits act solely as ?don?t care? spacer bits. this ?mask header? is not part of the actual partial tag id. the mask pattern follows the mask header and is terminated by the end of command. leading 0 don?t care mask bits + 1 = mask header (not part of partial tag id) x = don?t care mask bits example of selectngroup parameters: sample tag id 6cb9 : 01 10 11 00 10 11 10 01 the above tag id would be selected by all the following groupnselect command parameters: 1) command parameter: partial tag id: 0 00 00 00 1 0 00 11 xx xx xx x0 00 11 xx xx 2) command parameter: partial tag id: 0 00 00 00 00 01 11 11 xx xx xx xx xx 11 11 xx 3) command parameter: partial tag id: 0 00 00 00 00 00 00 00 1 0 xx xx xx xx xx xx xx x0 4) command parameter: partial tag id: 1 00 10 11 00 10 11 10 01 00 10 11 00 10 11 10 01 table 7-28. interrogator command parameters command parameter 1 parameter 2 selectgroup = 00 10 1 mask header: 35 4681c?rfid?09/05 ata5558 [preliminary] 7.15 armclear a selected tag, when receiving the armclear command with the master key not set to 6 will prepare the device for a subsequent clearall command. if this command is followed by any command other than a clearall, it will become disarmed. in which case the armclear must be repeated before a clearall can be successfully executed. 7.16 clearall tags in the selected st ate, if previously armed by the ar mclear command will clear all memory blocks and their lock bits with the except ion of the traceability data blocks (see figure 2-3 on page 4 in ?memory? section). the clearall command includes an eeprom programming sequence. the maximum eeprom programming time is 6 ms. on completion of a succ essful clear the tag replies with a single sof pattern. if for any reason the clear operation fails, the tag will generate the corres ponding error code. the error code bits are dual pattern coded (see figure 3-2 on page 11 and table 7-2 on page 26 ) and are preceded by a sof pattern. if the cons tant downlink checksum crc_d (if appended) is incorrect, the clear operation is aborted and an error response is returned immediately. table 7-30. interrogator command command parameter armclear = 00 11 00 10 00 00 00 00 10 bits 6 bits table 7-31. tag response sof start of frame 3 .. 10-bit period table 7-32. interrogator command parameters command parameter 1 parameter 2 parameter 3 crc (optional) clearall = 00 01 01 11 11 00 32 0 bits crc_u = 96adh 4 bits 6 bits 2 bits 32 bits 16 bits table 7-33. tag response sof error flags start of frame present on error only 3 .. 10-bit period 4-bit ? dual pattern code 36 4681c?rfid?09/05 ata5558 [preliminary] 8. absolute maximum ratings stresses beyond those listed under ?absolute maximum ratings? may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions beyond t hose indicated in the operational sections of this specification is not implied. exposure to absolute maximum rati ng conditions for extended periods may affect device reliability . parameters symbol value unit maximum dc current into coil 1/coil 2 i coil 20 ma maximum ac current into coil 1/coil 2 f = 125 khz i coil p 20 ma power dissipation (dice) (free-air condition, time of application: 1 s) p tot 100 mw electrostatic discharge maximum to mil?standard 883 c method 3015 v max 2000 v operating ambient temperature range t amb ?40 to +85 c storage temperature range (data retention reduced) t stg ?40 to +150 c 9. electrical characteristics t amb = +25c; f coil = 125 khz; unless otherwise specified no. parameters test conditions symbol min. typ. max. unit type* 1 rf frequency range f rf 100 125 250 khz 2.1 supply current (without current consumed by the external lc tank circuit) t amb = 25c (3) (see figure 9-1 on page 37 ) i dd 35at 2.2 read ? full temperature range 47aq 2.3 program eeprom 25 40 a q 3.1 coil voltage (ac supply) por threshold (50 mv hysteresis) v coil pp 3.2 3.6 4.0 v q 3.2 read, select, login command (2) 6v clamp vq 3.3 write/program eeprom (2) 6v clamp vq 4 start-up time v coil pp = 6 v t startup 2.5 3 ms q 5clamp voltage 10 ma current into coil 1/coil 2 v clamp 716vt v clamp /t amb ?7.5 q 6.1 modulation parameters v coilpp = 6 v on test circuit generator and modulation on (4) v mod pp 4.2 4.8 v t 6.2 i mod pp 400 600 a t 6.3 thermal stability v mod /t amb ?4.5 mv/c q *) type means: t: directly or indirectly tested during produ ction; q: guaranteed based on in itial product qualification data notes: 1. eeprom device performance can be influenced by subsequen t customer assembly processes especially if subjected to high temperatures or mechanical stress conditions. so atmel co nfirms these parameters only for devices as they leave the atmel production, as undiced wafers or diced wafers in tray, etc. 2. current into coil 1/coil 2 is limited to 10 ma. the damping char acteristics are defined by the internally limited supply volt - age (= minimum ac coil voltage). 3. i dd measurement setup r = 100 k ? ; v clk = v coil = 5 v: eeprom programmed to 00 ... 000 (erase all); nrz, public mode. i dd = (v outmax ? v clk )/r 4. v mod measurement setup: r = 2.3 k ? ; v clk = 3 v; setup with modulation enabled (see figure 9-1 on page 37 ). 5. the tolerance of the on-chip resonance capacitor is 10% at 3s over whole production. the capacitor tolerance is 3% at 3 on a wafer basis. 37 4681c?rfid?09/05 ata5558 [preliminary] figure 9-1. measurement setup for v mod 7 programming time from last command gap to sof pattern (36 + 648 internal clocks) t prog 55.76mst 8 endurance erase all/write all (1) n cycle 100000 cycles q 9.1 data retention top = 55 c (1) t retention 10 20 50 years 9.2 top = 150 c (1) t retention 96 hrs t 9.3 top = 250 c (1) t retention 24 hrs q 10 resonance capacitor mask option (5) cr 70 78 86 pf t 9. electrical characteristics (continued) t amb = +25c; f coil = 125 khz; unless otherwise specified no. parameters test conditions symbol min. typ. max. unit type* *) type means: t: directly or indirectly tested during produ ction; q: guaranteed based on in itial product qualification data notes: 1. eeprom device performance can be influenced by subsequen t customer assembly processes especially if subjected to high temperatures or mechanical stress conditions. so atmel co nfirms these parameters only for devices as they leave the atmel production, as undiced wafers or diced wafers in tray, etc. 2. current into coil 1/coil 2 is limited to 10 ma. the damping char acteristics are defined by the internally limited supply volt - age (= minimum ac coil voltage). 3. i dd measurement setup r = 100 k ? ; v clk = v coil = 5 v: eeprom programmed to 00 ... 000 (erase all); nrz, public mode. i dd = (v outmax ? v clk )/r 4. v mod measurement setup: r = 2.3 k ? ; v clk = 3 v; setup with modulation enabled (see figure 9-1 on page 37 ). 5. the tolerance of the on-chip resonance capacitor is 10% at 3s over whole production. the capacitor tolerance is 3% at 3 on a wafer basis. coil 1 ata5558 coil 2 substrate - + v clk r 750 750 bat68 bat68 38 4681c?rfid?09/05 ata5558 [preliminary] notes: 1. for available order codes refer to atmel sales/marketing 2. unique customer id code programming according to figure 2-3 on page 4 is linked to a minimum order quantity of 1 mio parts per year 10.1 delivery pre-configuration the ata5558 is delivered in a pre-programmed state. the trac eability blocks (59-61) contain unique non erasable traceability data as described in section ?traceability data? on page 5 . the remaining memory contains erasable demonstration data which can be replaced by customer data after having been cleared using a sequence of select, armclear and clearall commands. the demonstration data represents the following device configuration: block 63 contains configuration data representing public mode, fdx-b modulation, a data rate of rf/32, a tag id length of 64 bits, pream ble value of 7 and a ma ximum public mode block value (maxblock) of 3. blocks 0-3 contain an fdx-b encoded animal id code in accordance with iso 11784 represent- ing a national id code 000123456789 and country code 999. the tag id blocks 56-57 contain a direct copy of the unique tr aceability data hel d in blocks 59-60 thus each delivered device w ill have it?s own 64 bit unique tag id code with which anticol- lision arbitration can be demonstrated. all other blocks are erased. 10.2 ordering examples (recommended) ata555811 - tested dice on unsawn 6? wafer, thickness 300 m, no on-chip capacitor, no damping during por initialization. 10. ordering information (1) ata5558 a b m c c - x x x package - ddw - ddt (-pae (-pp - dice on wafer, 6? un-sawn wafer, thickness 300 m - dice in tray (waffle pack), thickness 300 m - noa-2 micromodule planned) - plastic transponder planned) drawing see figure 10-2 on page 40 see figure 10-3 on page 41 customer id (2) m01 - atmel standard (corresponds to 00 ) - customer x unique id code (1) 11 12 14 (15 - 2 pads without on-chip c - 2 pads with on-chip 80 pf - 2 pads with on-chip 210 pf - micromodule with 330 pf planned) see figure 10-1 on page 39 see figure 10-1 on page 39 see figure 10-1 on page 39 see figure 10-1 on page 39 39 4681c?rfid?09/05 ata5558 [preliminary] 10.3 package information figure 10-1. 2 pad layout for wire bonding c2 c1 dimensions in m ata5558 650 186 186 70 100 1630 274 1300 72 40 4681c?rfid?09/05 ata5558 [preliminary] figure 10-2. micromodule 41 4681c?rfid?09/05 ata5558 [preliminary] figure 10-3. plastic transponder printed on recycled paper. 4681c?rfid?09/05 ? atmel corporation 2005 . all rights reserved. atmel ? , logo and combinations thereof, everywhere you are ? , idic ? and others, are regis- tered trademarks or trademarks of atmel corporation or its subsid iaries. other terms and product names may be trademarks of oth ers. disclaimer: the information in this document is provided in connection with atmel products. no license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of atmel products. except as set forth in atmel?s terms and condi- tions of sale located on atmel? s web site, atmel assumes no liability whatsoever and disclaims any express, implied or statutor y warranty relating to its products including, but not limited to, the implied warranty of merchantability, fitness for a particu lar purpose, or non-infringement. in no event shall atmel be liable for any direct, indirect, conseque ntial, punitive, special or i nciden- tal damages (including, without limitation, damages for loss of profits, business interruption, or loss of information) arising out of the use or inability to use this document, even if at mel has been advised of the possibility of such damages. atmel makes no representations or warranties with respect to the accuracy or completeness of the contents of this document and reserves the ri ght to make changes to specifications and product descriptions at any time without notice. atmel does not make any commitment to update the information contained her ein. unless specifically provided otherwise, atmel products are not suitable for, and shall not be used in, automotive applications. atmel?s products are not int ended, authorized, or warranted for use as components in applications intended to support or sustain life. atmel corporation atmel operations 2325 orchard parkway san jose, ca 95131, usa tel: 1(408) 441-0311 fax: 1(408) 487-2600 regional headquarters europe atmel sarl route des arsenaux 41 case postale 80 ch-1705 fribourg switzerland tel: (41) 26-426-5555 fax: (41) 26-426-5500 asia room 1219 chinachem golden plaza 77 mody road tsimshatsui east kowloon hong kong tel: (852) 2721-9778 fax: (852) 2722-1369 japan 9f, tonetsu shinkawa bldg. 1-24-8 shinkawa chuo-ku, tokyo 104-0033 japan tel: (81) 3-3523-3551 fax: (81) 3-3523-7581 memory 2325 orchard parkway san jose, ca 95131, usa tel: 1(408) 441-0311 fax: 1(408) 436-4314 microcontrollers 2325 orchard parkway san jose, ca 95131, usa tel: 1(408) 441-0311 fax: 1(408) 436-4314 la chantrerie bp 70602 44306 nantes cedex 3, france tel: (33) 2-40-18-18-18 fax: (33) 2-40-18-19-60 asic/assp/smart cards zone industrielle 13106 rousset cedex, france tel: (33) 4-42-53-60-00 fax: (33) 4-42-53-60-01 1150 east cheyenne mtn. blvd. colorado springs, co 80906, usa tel: 1(719) 576-3300 fax: 1(719) 540-1759 scottish enterprise technology park maxwell building east kilbride g75 0qr, scotland tel: (44) 1355-803-000 fax: (44) 1355-242-743 rf/automotive theresienstrasse 2 postfach 3535 74025 heilbronn, germany tel: (49) 71-31-67-0 fax: (49) 71-31-67-2340 1150 east cheyenne mtn. blvd. colorado springs, co 80906, usa tel: 1(719) 576-3300 fax: 1(719) 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